This invention relates to semiconductor integrated circuits having electrical devices formed in PN-junction isolated islands, and more particularly to such integrated circuits wherein an adjacent asymmetrical structure to one of the islands substantially prevents injected parasitic current from the one island into the substrate from being collected by others of the islands.
Momentary or repetitive forward biasing of a PN-junction isolated island can occur, for example, when a transistor formed in that island is used to drive an inductive load. And forward biasing of a first integrated circuit island tends to create a parasitic bipolar transistor having an emitter corresponding to the first island, a base corresponding to the substrate, and a collector corresponding to a neighboring second PN-junction isolated island. This can result in multiple unwanted effects, e.g. spurious currents in the second island that can cause malfunction of a device formed in the second island, and increased integrated circuit power dissipation and overheating. The effect on the neighboring islands is especially troublesome when the device of the first island is substantially larger than and carries heavier currents than do small surrounding islands.
Toward ameliorating this problem, the power device in the large island may be designed to inject reduced amounts of carriers into the substrate when the PN-junction isolating that island is forward biased. An example of such a structure is described by Mayrand in U.S. Pat. No. 4,458,158, issued Jul. 3, 1984 and assigned to the same assignee as is the present invention.
Alternatively, the large island that is prone to inject electrons into the substrate may include structures that block and divert such injected carriers away from adjacent small islands which tend to collect the injected carriers. Such a construction is described by Genesi in U.S. Pat. No. 4,027,325, issued May 31, 1977 and assigned to the same assignee as is the present invention.
In that patent, a large power diode is to operate in a full wave bridge rectifier with anode connected to the most negative voltage, in this case ground. The island containing the power diode is of N-type epitaxial material serving as the cathode, and is formed in the P type substrate serving as the anode. When the diode is forward biased, the electrons injected into the substrate are substantially prevented from being collected by adjacent epitaxial islands by an annular N-type ring that surrounds but is spaced from the diode island. Both the N-type ring and the anode, namely the P-type substrate (and isolation walls), are electrically connected together.
Three other such "defensive" structures are illustrated herein in FIGS. 1, 2 and 3. In both FIGS. 1 and 2, the large island 10, or the island that is prone to become forward biased and inject electrons into the substrate 12, is intended to contain a power diode or transistor, and is surrounded by a spaced-away annular N-type ring or moat 14.
The protective N-type ring 14 in FIG. 1 is electrically connected to a positive bias voltage whereby the ring 14 serves as a preemptive collector of electrons, diverting them from surrounding islands 19.
In FIG. 2, the protective N-type ring 14 is simply connected electrically to the adjacent outer P-type isolation wall 16. Again the ring 14 serves to collect the injected electrons, but in this case they must flow through the ring 14, this current flowing again into the substrate 12 and out through the annular P-type isolation wall to the circuit ground point. Operation in this construction is based upon the premise that the radial flow of current in the substrate 12 generates a field that results in recombination of excess electrons which are thus prevented from reaching islands 19 adjacent to the large island. The field tends to confine the excess electrons to the portion of the substrate 12 under large island 10, and the recombination current must flow out through the grounded isolation wall 18 to ground.
The third "defensive" structure is illustrated herein in FIG. 3. The large epitaxial island 20 that is prone to become forward biased and inject electrons into the substrate 12, is intended to contain a power diode or transistor in the island portion 20a. The power device in island portion 20a is expected to cause island 20 to periodically forward bias the island-to-substrate PN-junction 21, at which time injected electrons tend to be collected by adjacent epitaxial N-type islands 22. A heavily doped N-type buried layer 24 is formed at the bottom of the island 20, which buried layer 24 contacts the system of heavily doped N-type walls 26 that delimit and mutually separate within the island 20 the island portions 20a and 20b.
A bipolar transistor 28 is formed in the island portion 20b to serve in a protective role for diverting injected carriers in the substrate 12 from reaching the adjacent islands 22. The P-type region 29 and the N-type region 31 serve respectively as the base and collector of the protective transistor 28 wherein the lightly doped N-type island portion 20b is the emitter. A conductor 32 connects the collector 29 of protective transistor 28 to the P-type isolation wall 34 which separates island 20 from islands 22. The isolation wall 36 at the opposite side of island 20 is connected to ground, i.e. the circuit point of lowest DC bias voltage.
The island portion 20b and protective transistor 28 are located to the left (as shown), away from the isolation wall 34 and the islands 22 to be protected. These relative positions and connections lead to a debiassing of the forward biased PN-junction 21 which causes a decrease in the collection of injected charge toward the adjacent islands 22. It is believed that in operation, this structure creates a current through protective transistor 28 that flows through conductor 32 and the substrate resistance 35, debiassing the PN-junction 21 most strongly at isolation wall 34 and progressively less strongly along the buried layer 24 and finally least strongly at isolation wall 36, so that injection is most pronounced in regions remote from the protected islands 22.
In FIG. 4a, the equivalent circuit of the structure of FIG. 3 is shown, wherein the PN-junction 21 is represented as a diode, the parasitic transistor 39 has a base corresponding to the P-type substrate 12, an emitter which is the N-type injecting island 20, and the collector(s) are the islands 22 to be protected.
The resistor 35 in FIG. 4a represents the substrate resistance (35a, 35b and 35c) under the island 20 in FIG. 3 through which the debiassing current flows from isolation wall 36, through substrate 12 and conductor 32, to the collector of protective transistor 28.
To account for the distributed nature of the relationship between PN-junction 21 and substrate resistance 35, the further developed the lumped equivalent circuit of the structure of FIG. 3 as shown in FIG. 4b. Substrate resistance, resistor 35, is shown as discrete resistors 35a, 35b, 35c, whereas the injecting island to substrate PN-junction 21 is shown as diodes 21a, 21b, 21c and 21d (the base-emitter junction of transistor 39). The base-emitter junction 27 of the protective transistor 28 is of a separate construction and parallels diode 21a.
It is an object of this invention to provide a new and improved means for protecting devices formed in PN-junction isolated islands from the collecting of current having been injected into the substrate by another and forward biased island.